Welsh Centre for Printing and Coatings
Tuesday November 26, 2024
In this week’s lecture, you will learn more about assembly language and the diverse ways to access data dependent on what it is and where it is stored.
This is based around a concept known as addressing modes.
In this section we will review a number of different addressing modes relevant to the Atmel ATMega328 Microcontroller including, inherent, immediate, direct, indirect and relative.
The AVR® Enhanced RISC microcontroller supports powerful and efficient addressing modes for access to the program memory (Flash) and Data memory (SRAM, Register file, I/O Memory, and Extended I/O Memory).
The Atmel ATmega328 microcontroller makes use of the following addressing modes:
For instructions that use inherent addressing, sometimes called implicit or implied addressing, the operands are not explicitly specified but are implied by the instruction1.
Mnemonic | Operands | Decription |
---|---|---|
CLZ |
- | Clear Zero Flag in SREG |
SEI |
- | Global Interrupt Enable |
CLI |
- | Global Interrupt Disable |
SES |
- | Set Sign Bit in SREG |
CLS |
- | Clear Sign Bit in SREG |
SEV |
- | Set Two’s Complement Overflow bit in SREG |
CLV |
- | Clear Two’s Complement Overflow bit in SREG |
SET |
- | Set T bit in SREG |
CLT |
- | Clear T bit in SREG |
SEH |
- | Set Half Carry Flag in SREG |
CLH |
- | Clear Half Carry Flag in SREG |
For these operators, the operands are contained in registers in the register file. There are single register operators which operates on and returns the result to the destination register, known as Rd
2.
Rd
)For instructions that use single direct register addressing, the operand is contained in the destination register Rd as illustrated in Figure 2.
Rd
, Rr
)Within the user data space there are 64 I/O registers as well as 160 Extended I/O registers. The first 64 of these can be accessed using instructions such as IN
and OUT
using I/O direct addressing mode. In I/O direct addressing mode the operands contain the address A of one of the lower 64 I/O locations and a source (Rr
) or destination register (Rd
). This is illustrated in Figure 4.
Instructions that use direct data addressing are two words (32-bits) in length, the first operand, Rr
/Rd
is one of the general-purpose registers and the second is 16-bit Data Address contained in the 16 LSBs of the two-word instruction. This is illustrated in Figure 5.
Instructions that use immediate addressing, take one clock-cycle to complete.
For example LDI
- load immediate:
Instructions that use register or data direct addressing, take two clock-cycles to complete.
For example LDS
- load from store needs to load the operator and decode the register address, then load data from the data space into the register.
With instructions that use indirect data addressing the operand address is the contents of one of the X- Y- Z-pointer registers. This is illustrated in Figure 7.
As with indirect data addressing, the microcontroller makes use of the Y and/or Z pointers with an additional displacement to access data stored in the data space.
This is the best way to access an array of data and is illustrated in Figure 8.
Indirect Data Addressing mode also supports Post-increment and Pre-decrement addressing.
With relative program memory addressing the operand contains a signed 12-bit offset value which during execution is added to the program counter to change the flow of the program.
The destination of the branch (effective address) instruction is calculated by adding the signed byte following the opcode (-2048 to +2047) to the PC content. This is illustrated in Figure 9.
RJMP LED1 -> 1100 kkkk kkkk kkkk
is
C006 = 1100 0000 0000 0110 -> RJMP +6
In this section have reviewed different addressing modes supported by the AVR instruction set commenting on use cases and speed (in clock cycles) of their operation.
You should review Section 3 of the AVR instructions set manual (Atmel 2020) on program and data addressing modes. There is a short quiz covering the content of this chapter.
In preparation for the class test next week, you should review all the content covered in these lecture notes, self-directed study material and the lab classes.
Note that the class test is closed-book but you have will access to the reference manuals mentioned in these notes.
In inherent addressing the effective address that the operation acts on is the register itself.
The d
in Rd
is a number in the range 0-31.
The r
in Rr
is also a number in the range 0-31.
Note: in these examples, the labels PIND
and PORTC
must have already been defined.
the value of the second operand of an operator with immediate addressing will be hard coded into the code and cannot be changed during the running of a program.